C Atomic Instruction Mapping

2021/07/06 (Updated: 2023/08/08). The latest version of this page is available at https://www.pusnow.com/note/c-atomic-instruction-mapping/.

Note

Mapping Table

Operation x86-64 armv8-a RISC-V rv64gc
Load (no atomic) mov rax, qword ptr [rip + y] adrp x8, y
ldr x0, [x8, :lo12:y]
lui a0, %hi(y)
ld a0, %lo(y)(a0)
Load (implicit) mov rax, qword ptr [rip + x] adrp x8, x
add x8, x8, :lo12:x
ldar x0, [x8]
fence rw, rw
lui a0, %hi(x)
ld a0, %lo(x)(a0)
fence r, rw
Load (relaxed) mov rax, qword ptr [rip + x] adrp x8, x
ldr x0, [x8, :lo12:x]
lui a0, %hi(x)
ld a0, %lo(x)(a0)
Load (consume) mov rax, qword ptr [rip + x] adrp x8, x
add x8, x8, :lo12:x
ldar x0, [x8]
lui a0, %hi(x)
ld a0, %lo(x)(a0)
fence r, rw
Load (acquire) mov rax, qword ptr [rip + x] adrp x8, x
add x8, x8, :lo12:x
ldar x0, [x8]
lui a0, %hi(x)
ld a0, %lo(x)(a0)
fence r, rw
Load (release) Watomic-memory-ordering Watomic-memory-ordering Watomic-memory-ordering
Load (acq_rel) Watomic-memory-ordering Watomic-memory-ordering Watomic-memory-ordering
Load (seq_cst) mov rax, qword ptr [rip + x] adrp x8, x
add x8, x8, :lo12:x
ldar x0, [x8]
fence rw, rw
lui a0, %hi(x)
ld a0, %lo(x)(a0)
fence r, rw
Store (no atomic) mov qword ptr [rip + y], rdi adrp x8, y
str x0, [x8, :lo12:y]
lui a1, %hi(y)
sd a0, %lo(y)(a1)
Store (implicit) xchg qword ptr [rip + x], rdi adrp x8, x
add x8, x8, :lo12:x
stlr x0, [x8]
fence rw, w
lui a1, %hi(x)
sd a0, %lo(x)(a1)
Store (relaxed) mov qword ptr [rip + x], rdi adrp x8, x
str x0, [x8, :lo12:x]
lui a1, %hi(x)
sd a0, %lo(x)(a1)
Store (consume) Watomic-memory-ordering Watomic-memory-ordering Watomic-memory-ordering
Store (acquire) Watomic-memory-ordering Watomic-memory-ordering Watomic-memory-ordering
Store (release) mov qword ptr [rip + x], rdi adrp x8, x
add x8, x8, :lo12:x
stlr x0, [x8]
fence rw, w
lui a1, %hi(x)
sd a0, %lo(x)(a1)
Store (acq_rel) Watomic-memory-ordering Watomic-memory-ordering Watomic-memory-ordering
Store (seq_cst) xchg qword ptr [rip + x], rdi adrp x8, x
add x8, x8, :lo12:x
stlr x0, [x8]
fence rw, w
lui a1, %hi(x)
sd a0, %lo(x)(a1)
Exchange (implicit) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB16_1:
ldaxr x0, [x8]
stlxr w10, x9, [x8]
cbnz w10, .LBB16_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d.aqrl a0, a1, (a0)
Exchange (relaxed) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB17_1:
ldxr x0, [x8]
stxr w10, x9, [x8]
cbnz w10, .LBB17_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d a0, a1, (a0)
Exchange (consume) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB18_1:
ldaxr x0, [x8]
stxr w10, x9, [x8]
cbnz w10, .LBB18_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d.aq a0, a1, (a0)
Exchange (acquire) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB19_1:
ldaxr x0, [x8]
stxr w10, x9, [x8]
cbnz w10, .LBB19_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d.aq a0, a1, (a0)
Exchange (release) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB20_1:
ldxr x0, [x8]
stlxr w10, x9, [x8]
cbnz w10, .LBB20_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d.rl a0, a1, (a0)
Exchange (acq_rel) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB21_1:
ldaxr x0, [x8]
stlxr w10, x9, [x8]
cbnz w10, .LBB21_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d.aqrl a0, a1, (a0)
Exchange (seq_cst) mov eax, 42
xchg qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
mov w9, #42
.LBB22_1:
ldaxr x0, [x8]
stlxr w10, x9, [x8]
cbnz w10, .LBB22_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoswap.d.aqrl a0, a1, (a0)
Fetch Add (implicit) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB23_1:
ldaxr x0, [x8]
add x9, x0, #42
stlxr w10, x9, [x8]
cbnz w10, .LBB23_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d.aqrl a0, a1, (a0)
Fetch Add (relaxed) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB24_1:
ldxr x0, [x8]
add x9, x0, #42
stxr w10, x9, [x8]
cbnz w10, .LBB24_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d a0, a1, (a0)
Fetch Add (consume) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB25_1:
ldaxr x0, [x8]
add x9, x0, #42
stxr w10, x9, [x8]
cbnz w10, .LBB25_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d.aq a0, a1, (a0)
Fetch Add (acquire) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB26_1:
ldaxr x0, [x8]
add x9, x0, #42
stxr w10, x9, [x8]
cbnz w10, .LBB26_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d.aq a0, a1, (a0)
Fetch Add (release) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB27_1:
ldxr x0, [x8]
add x9, x0, #42
stlxr w10, x9, [x8]
cbnz w10, .LBB27_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d.rl a0, a1, (a0)
Fetch Add (acq_rel) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB28_1:
ldaxr x0, [x8]
add x9, x0, #42
stlxr w10, x9, [x8]
cbnz w10, .LBB28_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d.aqrl a0, a1, (a0)
Fetch Add (seq_cst) mov eax, 42
lock xadd qword ptr [rip + x], rax
adrp x8, x
add x8, x8, :lo12:x
.LBB29_1:
ldaxr x0, [x8]
add x9, x0, #42
stlxr w10, x9, [x8]
cbnz w10, .LBB29_1
lui a0, %hi(x)
addi a0, a0, %lo(x)
addi a1, zero, 42
amoadd.d.aqrl a0, a1, (a0)
Kill Dependency mov rax, qword ptr [rip + x] adrp x8, x
add x8, x8, :lo12:x
ldar x0, [x8]
fence rw, rw
lui a0, %hi(x)
ld a0, %lo(x)(a0)
fence r, rw
Thread Fence (relaxed) nop nop nop
Thread Fence (consume) nop dmb ishld fence r, rw
Thread Fence (acquire) nop dmb ishld fence r, rw
Thread Fence (release) nop dmb ish fence rw, w
Thread Fence (acq_rel) nop dmb ish fence.tso
Thread Fence (seq_cst) mfence dmb ish fence rw, rw
Signal Fence (relaxed) nop nop nop
Signal Fence (consume) nop nop fence r, rw
Signal Fence (acquire) nop nop fence r, rw
Signal Fence (release) nop nop fence rw, w
Signal Fence (acq_rel) nop nop fence.tso
Signal Fence (seq_cst) nop nop fence rw, rw